The invention relates to tunnel emission transistors, particularly for operation at submillimeter and optical wave frequencies.
Characteristics required for high performance tunnel emission transistors operating in the submillimeter and infrared wave frequencies include the fabrication of metal-oxide-metal tunnel diode junctions having pinhole-free high quality oxide, minimal parasitic shunt capacitance, minimal series inductance, minimal series resistance, minimal thermal resistance, minimal junction area and minimal junction barrier potential. In addition, these tunneling junctions must provide stable characteristics, and the structural configuration should be suitable for use in monolithic integrated circuits and arrays.
A tunnel emission transistor can be fabricated as an MOMS device comprising metal.sub.1 -oxide-metal.sub.2 -semiconductor. In the MOMS configuration, metal.sub.1 is the emitter, the oxide is the emitter to base junction, metal.sub.2 is the base, the base-collector junction is provided by a depletion layer in the semiconductor material formed by a schottky junction with metal.sub.2, and the collector is the semiconductor.
The design and fabrication of MOMS tunnel emission transistors involves inherent difficulties and fundamental limits associated with the basic MOM junction. While some structures have been successfully fabricated and used as detectors and mixers at frequencies ranging from submillimeter to infrared frequencies with reasonably good performance, such structures have fundamental drawbacks limiting their practical usage in real world non-laboratory environments, and hence have not been commercially successful.
FIG. 1 shows a whisker-type MOM junction device 2 having a metal substrate 3, a dielectric oxide layer 4 on the substrate, and a metal whisker 5 making point contact 6 with oxide 4. The major disadvantage of a whisker-type structure such as 2 is the instability of the junction 6 due to thermal and pressure effects, rendering such structure a laboratory curiosity, not a practical device. Furthermore, even if the stability problem could be overcome, such structure would have limited use because of its incompatability with present advanced system design integrated circuits and arrays.
To overcome the problems inherent in point contact devices, attempts have been made to fabricate MOM tunnel diode devices in planar structures. FIG. 2 shows a side cross sectional view of such a device 7 comprising metal 8, oxide 9 and metal 10 positioned essentially in planar layers one above the other. FIG. 3 is a side cross sectional view of a device 11 comprising metal 12, masking oxide 13, junction oxide 14 and metal 15. FIG. 4 is a top plan view of the structure of FIG. 3 showing the circular configuration of the junction at 16. The devices of FIGS. 2-4 attempt to produce the equivalent of a point contact device such as 2 but using planar technology, even though the small dimensions of the point contact junction 6 cannot be achieved in the designs of FIGS. 2-4. The designs of FIGS. 2-4 further suffer high series resistance, high parasitic shunt capacitance, large junction areas on the order of 10.sup.-7 cm.sup.2 to 10.sup.-8 cm.sup.2, and undesirably high skin resistance. Operating efficiency is severely limited at frequencies on the order of 1,000 gigahertz.
There are additional processing related problems which prevent achieving a satisfactory planar device. Planar technology prevents defining an extremely small junction area or producing a metal layer with a high quality uniform thickness free of impurities and pinholes or a metal surface that is extremely smooth and without defects. Processing techniques generally use either a wet chemical etches or a pure sputtering etch. Both of these techniques lead to the formation of poor surface morphology which is not conducive to obtaining a thin uniform oxide necessary for the fabrication of high performance devices. Conventional optical lithography combined with either of the above etching processes cannot prevent the required small junction area in the 10.sup.-8 to 10.sup.-10 cm.sup.2 range. Even if it were possible to define a linewidth of 1 micron, it would still be difficult to fabricate the desired junction area reliably using the above noted processing techniques. In order to realize a 1 micron linewidth, the thickness of the metal would have to be limited to about 1,000 angstroms, thus increasing the resistivity of the leads to an unacceptably high value.
The ability to produce a very small junction area in a planar diode structure, FIGS. 2-4, is restricted by the dielectric layers such as 13. Layer 13 must be very thin in order to photolithographically define the junction. If the dielectric layer is too thick, the junction would not be well defined because the etching may not proceed uniformly through the thick dielectric layer. Since the dielectric layer 13 has to be thin, the region where metals 12 and 15 overlap will contribute an excessive amount of parasitic shunt capacitance. This capacitance will increase the diode's RC time constant, and thus lower the useful operating range of the diode to frequencies well below 1,000 gigahertz.
Another difficulty inherent in prior MOM junctions is that the required very thin oxide is derived from pure elements, for example tungsten, aluminum, etc., that result in the formation of the respective oxides such as WO.sub.3 Al.sub.2 O.sub.3, etc., having high dielectric constants and high losses. Using these dielectrics results in high junction capacitance. Furthermore, the thickness and purity of such dielectrics is not accurately controllable or repeatable because of the thermal, air ambient, or chemical exposure type oxidation techniques.
FIG. 5 shows a prior MOM tunnel emission transistor 17 having a silicon semiconductor substrate 18 with a gold layer 19 on its upper surface and a silicon dioxide film 20 on layer 19 engaged by bulged mercury emitter electrode 21. Collector electrode 22 contacts semiconductor layer 18. The MOMS transistor is formed by metal 21-oxide 20-metal 19-semiconductor 18.